diff --git a/docs.it4i/software/intel/intel-xeon-phi-salomon.md b/docs.it4i/software/intel/intel-xeon-phi-salomon.md
index 465ec15dbd7b1480e7a65d82efefb398058f72f9..dde796968e9abea7eb5ca34770592f38c41a8389 100644
--- a/docs.it4i/software/intel/intel-xeon-phi-salomon.md
+++ b/docs.it4i/software/intel/intel-xeon-phi-salomon.md
@@ -2,17 +2,17 @@
 
 ## Guide to Intel Xeon Phi Usage
 
-Intel Xeon Phi accelerator can be programmed in several modes. The default mode on the cluster is offload mode, but all modes described in this document are supported.
+The Intel Xeon Phi accelerator can be programmed in several modes. The default mode on the cluster is offload mode, but all modes described in this document are supported.
 
 ## Intel Utilities for Xeon Phi
 
-To get access to a compute node with Intel Xeon Phi accelerator, use the PBS interactive session
+To get access to a compute node with the Intel Xeon Phi accelerator, use the PBS interactive session:
 
 ```console
 $ qsub -I -q qprod -l select=1:ncpus=24:accelerator=True:naccelerators=2:accelerator_model=phi7120 -A NONE-0-0
 ```
 
-To set up the environment module "intel" has to be loaded, without specifying the version, default version is loaded (at time of writing this, it's 2015b)
+To set up the environment load the "intel" module. Without specifying the version, the default version is loaded (at time of writing this, it is 2015b):
 
 ```console
 $ ml intel
@@ -24,7 +24,7 @@ Information about the hardware can be obtained by running the micinfo program on
 $ /usr/bin/micinfo
 ```
 
-The output of the "micinfo" utility executed on one of the cluster node is as follows. (note: to get PCIe related details the command has to be run with root privileges)
+The output of the "micinfo" utility executed on one of the cluster node is as follows (note: to get PCIe related details, the command has to be run with root privileges):
 
 ```console
 MicInfo Utility Log
@@ -139,20 +139,20 @@ Device No: 1, Device Name: mic1
 
 ## Offload Mode
 
-To compile a code for Intel Xeon Phi a MPSS stack has to be installed on the machine where compilation is executed. Currently the MPSS stack is only installed on compute nodes equipped with accelerators.
+To compile code for Intel Xeon Phi, an MPSS stack has to be installed on the machine where the compilation is executed. Currently, the MPSS stack is only installed on compute nodes equipped with accelerators.
 
 ```console
 $ qsub -I -q qprod -l select=1:ncpus=24:accelerator=True:naccelerators=2:accelerator_model=phi7120 -A NONE-0-0
 $ ml intel
 ```
 
-For debugging purposes it is also recommended to set environment variable "OFFLOAD_REPORT". Value can be set from 0 to 3, where higher number means more debugging information.
+For debugging purposes, it is also recommended to set the "OFFLOAD_REPORT" environment variable. The value can be set from 0 to 3, where a higher number means more debugging information.
 
 ```console
 export OFFLOAD_REPORT=3
 ```
 
-A very basic example of code that employs offload programming technique is shown in the next listing. Note that this code is sequential and utilizes only single core of the accelerator.
+A very basic example of code that employs offload programming technique is shown in the next listing. Note that this code is sequential and utilizes only a single core of the accelerator.
 
 ```cpp
 $ cat source-offload.cpp
@@ -174,13 +174,13 @@ int main(int argc, char* argv[])
 }
 ```
 
-To compile a code using Intel compiler run
+To compile the code using Intel compiler, run:
 
 ```console
 $ icc source-offload.cpp -o bin-offload
 ```
 
-To execute the code, run the following command on the host
+To execute the code, run the following command on the host:
 
 ```console
 $ ./bin-offload
@@ -188,7 +188,7 @@ $ ./bin-offload
 
 ### Parallelization in Offload Mode Using OpenMP
 
-One way of paralelization a code for Xeon Phi is using OpenMP directives. The following example shows code for parallel vector addition.
+One way of code paralelization for Xeon Phi is using OpenMP directives. The following example shows code for a parallel vector addition:
 
 ```cpp
 $ cat ./vect-add
@@ -268,7 +268,7 @@ int main()
 }
 ```
 
-During the compilation Intel compiler shows which loops have been vectorized in both host and accelerator. This can be enabled with compiler option "-vec-report2". To compile and execute the code run
+During the compilation, the Intel compiler shows which loops have been vectorized in both the host and the accelerator. This can be enabled with the "-vec-report2" compiler option. To compile and execute the code, run:
 
 ```console
 $ icc vect-add.c -openmp_report2 -vec-report2 -o vect-add
@@ -282,7 +282,7 @@ Some interesting compiler flags useful not only for code debugging are:
     openmp_report[0|1|2] - controls the compiler based vectorization diagnostic level
     vec-report[0|1|2] - controls the OpenMP parallelizer diagnostic level
 
-    Performance ooptimization
+    Performance optimization
     xhost - FOR HOST ONLY - to generate AVX (Advanced Vector Extensions) instructions.
 
 ## Automatic Offload Using Intel MKL Library
@@ -290,7 +290,7 @@ Some interesting compiler flags useful not only for code debugging are:
 Intel MKL includes an Automatic Offload (AO) feature that enables computationally intensive MKL functions called in user code to benefit from attached Intel Xeon Phi coprocessors automatically and transparently.
 
 !!! note
-    Behavioral of automatic offload mode is controlled by functions called within the program or by environmental variables. Complete list of controls is listed [here][a].
+    Behavior of the automatic offload mode is controlled by functions called within the program or by environmental variables. The complete list of controls is listed [here][a].
 
 The Automatic Offload may be enabled by either an MKL function call within the code:
 
@@ -298,24 +298,24 @@ The Automatic Offload may be enabled by either an MKL function call within the c
 mkl_mic_enable();
 ```
 
-or by setting environment variable
+or by setting the environment variable:
 
 ```console
 $ export MKL_MIC_ENABLE=1
 ```
 
-To get more information about automatic offload refer to "[Using Intel® MKL Automatic Offload on Intel ® Xeon Phi™ Coprocessors][b]" white paper or [Intel MKL documentation][c].
+To get more information about the automatic offload, refer to the "[Using Intel® MKL Automatic Offload on Intel ® Xeon Phi™ Coprocessors][b]" white paper or the [Intel MKL documentation][c].
 
 ### Automatic Offload Example
 
-At first get an interactive PBS session on a node with MIC accelerator and load "intel" module that automatically loads "mkl" module as well.
+At first, get an interactive PBS session on a node with the MIC accelerator and load the "intel" module that automatically loads the "mkl" module as well:
 
 ```console
 $ qsub -I -q qprod -l select=1:ncpus=24:accelerator=True:naccelerators=2:accelerator_model=phi7120 -A NONE-0-0
 $ ml intel
 ```
 
-The code can be copied to a file and compiled without any necessary modification.
+The code can be copied to a file and compiled without any necessary modification:
 
 ```cpp
 $ vim sgemm-ao-short.c
@@ -375,21 +375,21 @@ int main(int argc, char **argv)
 ```
 
 !!! note
-    This example is simplified version of an example from MKL. The expanded version can be found here: **$MKL_EXAMPLES/mic_ao/blasc/source/sgemm.c**
+    This example is a simplified version of an example from MKL. The expanded version can be found here: **$MKL_EXAMPLES/mic_ao/blasc/source/sgemm.c**
 
-To compile a code using Intel compiler use:
+To compile the code using the Intel compiler, use:
 
 ```console
 $ icc -mkl sgemm-ao-short.c -o sgemm
 ```
 
-For debugging purposes enable the offload report to see more information about automatic offloading.
+For debugging purposes, enable the offload report to see more information about automatic offloading:
 
 ```console
 $ export OFFLOAD_REPORT=2
 ```
 
-The output of a code should look similar to following listing, where lines starting with [MKL] are generated by offload reporting:
+The output of the code should look similar to the following listing, where the lines starting with [MKL] are generated by offload reporting:
 
 ```console
 [user@r31u03n799 ~]$ ./sgemm
@@ -411,19 +411,19 @@ Done
 ```
 
 !!! note ""
-    Behavioral of automatic offload mode is controlled by functions called within the program or by environmental variables. Complete list of controls is listed [here][d].
+    Behavior of the automatic offload mode is controlled by functions called within the program or by environmental variables. The complete list of controls is listed [here][d].
 
 ### Automatic Offload Example #2
 
-In this example, we will demonstrate automatic offload control via an environment vatiable MKL_MIC_ENABLE. The function DGEMM will be offloaded.
+In this example, we will demonstrate the automatic offload control via the MKL_MIC_ENABLE environment variable. The DGEMM function will be offloaded.
 
-At first get an interactive PBS session on a node with MIC accelerator.
+At first, get an interactive PBS session on the node with the MIC accelerator.
 
 ```console
 $ qsub -I -q qprod -l select=1:ncpus=24:accelerator=True:naccelerators=2:accelerator_model=phi7120 -A NONE-0-0
 ```
 
-Once in, we enable the offload and run the Octave software. In octave, we generate two large random matrices and let them multiply together.
+Once in, we enable the offload and run the Octave software. In Octave, we generate two large random matrices and let them multiply together:
 
 ```console
 $ export MKL_MIC_ENABLE=1
@@ -446,13 +446,13 @@ octave:3> C=A*B;
 octave:4> exit
 ```
 
-On the example above we observe, that the DGEMM function workload was split over CPU, MIC 0 and MIC 1, in the ratio 0.14 0.43 0.43. The matrix multiplication was done on the CPU, accelerated by two Xeon Phi accelerators.
+In the example above, we observe that the DGEMM function workload was split over CPU, MIC 0 and MIC 1, in the ratio 0.14 0.43 0.43. The matrix multiplication was done on the CPU, accelerated by two Xeon Phi accelerators.
 
 ## Native Mode
 
-In the native mode a program is executed directly on Intel Xeon Phi without involvement of the host machine. Similarly to offload mode, the code is compiled on the host computer with Intel compilers.
+In the native mode, a program is executed directly on Intel Xeon Phi without involvement of the host machine. Similarly to offload mode, the code is compiled on the host computer with the Intel compilers.
 
-To compile a code user has to be connected to a compute with MIC and load Intel compilers module. To get an interactive session on a compute node with an Intel Xeon Phi and load the module use following commands:
+To compile the code, the user has to be connected to a compute node with MIC and load the Intel compilers module. To get an interactive session on a compute node with Intel Xeon Phi and load the module, use the following commands:
 
 ```console
 $ qsub -I -q qprod -l select=1:ncpus=24:accelerator=True:naccelerators=2:accelerator_model=phi7120 -A NONE-0-0
@@ -460,9 +460,9 @@ $ ml intel
 ```
 
 !!! note
-    Particular version of the Intel module is specified. This information is used later to specify the correct library paths.
+    A particular version of the Intel module is specified. This information is used later to specify the correct library paths.
 
-To produce a binary compatible with Intel Xeon Phi architecture user has to specify "-mmic" compiler flag. Two compilation examples are shown below. The first example shows how to compile OpenMP parallel code "vect-add.c" for host only:
+To produce a binary compatible with the Intel Xeon Phi architecture, the user has to specify the "-mmic" compiler flag. Two compilation examples are shown below. The first example shows how to compile the OpenMP parallel code "vect-add.c" for the host only:
 
 ```console
 $ icc -xhost -no-offload -fopenmp vect-add.c -o vect-add-host
@@ -482,16 +482,16 @@ $ icc -mmic -fopenmp vect-add.c -o vect-add-mic
 
 ### Execution of the Program in Native Mode on Intel Xeon Phi
 
-The user access to the Intel Xeon Phi is through the SSH. Since user home directories are mounted using NFS on the accelerator, users do not have to copy binary files or libraries between the host and accelerator.
+User access to Intel Xeon Phi is via SSH. Since user home directories are mounted using NFS on the accelerator, users do not have to copy binary files or libraries between the host and the accelerator.
 
-Get the PATH of MIC enabled libraries for currently used Intel Compiler (here was icc/2015.3.187-GNU-5.1.0-2.25 used):
+Get the PATH of MIC enabled libraries for currently used Intel Compiler (here icc/2015.3.187-GNU-5.1.0-2.25 was used):
 
 ```console
 $ echo $MIC_LD_LIBRARY_PATH
 /apps/all/icc/2015.3.187-GNU-5.1.0-2.25/composer_xe_2015.3.187/compiler/lib/mic
 ```
 
-To connect to the accelerator run:
+To connect to the accelerator, run:
 
 ```console
 $ ssh mic0
@@ -503,16 +503,16 @@ If the code is sequential, it can be executed directly:
 mic0 $ ~/path_to_binary/vect-add-seq-mic
 ```
 
-If the code is parallelized using OpenMP a set of additional libraries is required for execution. To locate these libraries new path has to be added to the LD_LIBRARY_PATH environment variable prior to the execution:
+If the code is parallelized using OpenMP, a set of additional libraries is required for execution. To locate these libraries, a new path has to be added to the LD_LIBRARY_PATH environment variable prior to the execution:
 
 ```console
 mic0 $ export LD_LIBRARY_PATH=/apps/all/icc/2015.3.187-GNU-5.1.0-2.25/composer_xe_2015.3.187/compiler/lib/mic:$LD_LIBRARY_PATH
 ```
 
 !!! note
-    The path exported in the previous example contains path to a specific compiler (here the version is 2015.3.187-GNU-5.1.0-2.25). This version number has to match with the version number of the Intel compiler module that was used to compile the code on the host computer.
+    The path exported in the previous example contains the path to a specific compiler (here the version is 2015.3.187-GNU-5.1.0-2.25). This version number has to match with the version number of the Intel compiler module that was used to compile the code on the host computer.
 
-For your information the list of libraries and their location required for execution of an OpenMP parallel code on Intel Xeon Phi is:
+For your information, the list of libraries and their location required for execution of an OpenMP parallel code on Intel Xeon Phi is:
 
 !!! note
     /apps/all/icc/2015.3.187-GNU-5.1.0-2.25/composer_xe_2015.3.187/compiler/lib/mic
@@ -523,19 +523,19 @@ For your information the list of libraries and their location required for execu
     libirng.so
     libintlc.so.5
 
-Finally, to run the compiled code use:
+Finally, to run the compiled code, use:
 
 ## OpenCL
 
 OpenCL (Open Computing Language) is an open standard for general-purpose parallel programming for diverse mix of multi-core CPUs, GPU coprocessors, and other parallel processors. OpenCL provides a flexible execution model and uniform programming environment for software developers to write portable code for systems running on both the CPU and graphics processors or accelerators like the Intel® Xeon Phi.
 
-On Salomon OpenCL is installed only on compute nodes with MIC accelerator, therefore OpenCL code can be compiled only on these nodes.
+On Salomon, OpenCL is installed only on compute nodes with the MIC accelerator, so OpenCL code can be compiled only on these nodes.
 
 ```console
 ml opencl-sdk opencl-rt
 ```
 
-Always load "opencl-sdk" (providing devel files like headers) and "opencl-rt" (providing dynamic library libOpenCL.so) modules to compile and link OpenCL code. Load "opencl-rt" for running your compiled code.
+Always load "opencl-sdk" (providing devel files like headers) and "opencl-rt" (providing a dynamic library libOpenCL.so) modules to compile and link OpenCL code. Load "opencl-rt" for running your compiled code.
 
 There are two basic examples of OpenCL code in the following directory:
 
@@ -543,13 +543,13 @@ There are two basic examples of OpenCL code in the following directory:
 /apps/intel/opencl-examples/
 ```
 
-First example "CapsBasic" detects OpenCL compatible hardware, here CPU and MIC, and prints basic information about the capabilities of it.
+The first example "CapsBasic" detects OpenCL compatible hardware, here CPU and MIC, and prints basic information about its capabilities.
 
 ```console
 /apps/intel/opencl-examples/CapsBasic/capsbasic
 ```
 
-To compile and run the example copy it to your home directory, get a PBS interactive session on of the nodes with MIC and run make for compilation. Make files are very basic and shows how the OpenCL code can be compiled on Salomon.
+To compile and run the example, copy it to your home directory, get a PBS interactive session on one of the nodes with MIC, and run make for compilation. Make files are very basic and show how the OpenCL code can be compiled on Salomon.
 
 The compilation command for this example is:
 
@@ -557,7 +557,7 @@ The compilation command for this example is:
 $ g++ capsbasic.cpp -lOpenCL -o capsbasic -I/apps/intel/opencl/include/
 ```
 
-After executing the complied binary file, following output should be displayed.
+After executing the compiled binary file, the following output should be displayed:
 
 ```console
 ./capsbasic
@@ -586,9 +586,9 @@ CL_DEVICE_TYPE_ACCELERATOR[0]
 ```
 
 !!! note
-    More information about this example can be found on Intel website: <http://software.intel.com/en-us/vcsource/samples/caps-basic/>
+    More information about this example can be found on the Intel website: <http://software.intel.com/en-us/vcsource/samples/caps-basic/>
 
-To see the performance of Intel Xeon Phi performing the DGEMM run the example as follows:
+To see the performance of Intel Xeon Phi performing the DGEMM, run the example as follows:
 
 ```console
 ./gemm -d 1
@@ -611,57 +611,57 @@ Host perf: 426.081 GFLOP/s
 ```
 
 !!! hint
-    GNU compiler is used to compile the OpenCL codes for Intel MIC. You do not need to load Intel compiler module.
+    GNU compiler is used to compile the OpenCL codes for Intel MIC. You do not need to load the Intel compiler module.
 
 ## MPI
 
 ### Environment Setup and Compilation
 
-To achieve best MPI performance always use following setup for Intel MPI on Xeon Phi accelerated nodes:
+To achieve the best MPI performance, always use the following setup for Intel MPI on Xeon Phi accelerated nodes:
 
 ```console
 $ export I_MPI_FABRICS=shm:dapl
 $ export I_MPI_DAPL_PROVIDER_LIST=ofa-v2-mlx4_0-1u,ofa-v2-scif0,ofa-v2-mcm-1
 ```
 
-This ensures, that MPI inside node will use SHMEM communication, between HOST and Phi the IB SCIF will be used and between different nodes or Phi's on diferent nodes a CCL-Direct proxy will be used.
+This ensures that MPI inside the node will use the SHMEM communication; between HOST and Phi, the IB SCIF will be used and between different nodes or Phi's on different nodes, a CCL-Direct proxy will be used.
 
 !!! note
-    Other FABRICS like tcp,ofa may be used (even combined with shm) but there's severe loss of performance (by order of magnitude).
-    Usage of single DAPL PROVIDER (e. g. I_MPI_DAPL_PROVIDER=ofa-v2-mlx4_0-1u) will cause failure of Host<->Phi and/or Phi<->Phi communication.
-    Usage of the I_MPI_DAPL_PROVIDER_LIST on non-accelerated node will cause failure of any MPI communication, since those nodes don't have SCIF device and there's no CCL-Direct proxy runnig.
+    Other FABRICS like tcp or ofa may be used (even combined with shm) but there is a severe loss of performance (by order of magnitude).
+    Usage of a single DAPL PROVIDER (e.g. I_MPI_DAPL_PROVIDER=ofa-v2-mlx4_0-1u) will cause a failure of Host<->Phi and/or Phi<->Phi communication.
+    Usage of the I_MPI_DAPL_PROVIDER_LIST on a non-accelerated node will cause a failure of any MPI communication, since those nodes do not have aSCIF device and there's no CCL-Direct proxy runnig.
 
-Again an MPI code for Intel Xeon Phi has to be compiled on a compute node with accelerator and MPSS software stack installed. To get to a compute node with accelerator use:
+Again, an MPI code for Intel Xeon Phi has to be compiled on a compute node with the accelerator and MPSS software stack installed. To get to a compute node with the accelerator, use:
 
 ```console
 $ qsub -I -q qprod -l select=1:ncpus=24:accelerator=True:naccelerators=2:accelerator_model=phi7120 -A NONE-0-0
 ```
 
-The only supported implementation of MPI standard for Intel Xeon Phi is Intel MPI. To setup a fully functional development environment a combination of Intel compiler and Intel MPI has to be used. On a host load following modules before compilation:
+The only supported implementation of the MPI standard for Intel Xeon Phi is Intel MPI. To setup a fully functional development environment a combination of Intel compiler and Intel MPI has to be used. Before compilation, load the following modules on the host:
 
 ```console
 $ ml intel
 ```
 
-To compile an MPI code for host use:
+To compile an MPI code for the host, use:
 
 ```console
 $ mpiicc -xhost -o mpi-test mpi-test.c
 ```
 
-To compile the same code for Intel Xeon Phi architecture use:
+To compile the same code for Intel Xeon Phi architecture, use:
 
 ```console
 $ mpiicc -mmic -o mpi-test-mic mpi-test.c
 ```
 
-Or, if you are using Fortran :
+If you are using Fortran:
 
 ```console
 $ mpiifort -mmic -o mpi-test-mic mpi-test.f90
 ```
 
-An example of basic MPI version of "hello-world" example in C language, that can be executed on both host and Xeon Phi is (can be directly copy and pasted to a .c file)
+A basic MPI version of the "hello-world" example in C language, which can be executed on both the host and Xeon Phi, is (can be directly copied and pasted to a .c file):
 
 ```cpp
 #include <stdio.h>
@@ -690,7 +690,7 @@ int main (argc, argv)
 
 ### MPI Programming Models
 
-Intel MPI for the Xeon Phi coprocessors offers different MPI programming models:
+Intel MPI for Xeon Phi coprocessors offers different MPI programming models:
 
 !!! note
     **Host-only model** - all MPI ranks reside on the host. The coprocessors can be used by using offload pragmas. (Using MPI calls inside offloaded code is not supported.)
@@ -701,7 +701,7 @@ Intel MPI for the Xeon Phi coprocessors offers different MPI programming models:
 
 ### Host-Only Model
 
-In this case all environment variables are set by modules, so to execute the compiled MPI program on a single node, use:
+In this case, all environment variables are set by modules, so to execute the compiled MPI program on a single node, use:
 
 ```console
 $ mpirun -np 4 ./mpi-test
@@ -718,14 +718,14 @@ Hello world from process 0 of 4 on host r38u31n1000
 
 ### Coprocessor-Only Model
 
-There are two ways how to execute an MPI code on a single coprocessor: 1.) lunch the program using "**mpirun**" from the
-coprocessor; or 2.) lunch the task using "**mpiexec.hydra**" from a host.
+There are two ways how to execute an MPI code on a single coprocessor: 1) launch the program using "**mpirun**" from the
+coprocessor; or 2) launch the task using "**mpiexec.hydra**" from a host.
 
 #### Execution on Coprocessor
 
-Similarly to execution of OpenMP programs in native mode, since the environmental module are not supported on MIC, user has to setup paths to Intel MPI libraries and binaries manually. One time setup can be done by creating a "**.profile**" file in user's home directory. This file sets up the environment on the MIC automatically once user access to the accelerator through the SSH.
+Similarly to execution of OpenMP programs in native mode, since the environmental module is not supported on MIC, the user has to setup paths to Intel MPI libraries and binaries manually. One-time setup can be done by creating a "**.profile**" file in the user's home directory. This file sets up the environment on the MIC automatically once the user accesses the accelerator via SSH.
 
-At first get the LD_LIBRARY_PATH for currenty used Intel Compiler and Intel MPI:
+At first, get the LD_LIBRARY_PATH for currently used Intel Compiler and Intel MPI:
 
 ```console
 $ echo $MIC_LD_LIBRARY_PATH
@@ -749,16 +749,16 @@ export LD_LIBRARY_PATH=/apps/all/imkl/11.2.3.187-iimpi-7.3.5-GNU-5.1.0-2.25/mkl/
 ```
 
 !!! note
-    \* this file sets up both environmental variable for both MPI and OpenMP libraries.
-    \* this file sets up the paths to a particular version of Intel MPI library and particular version of an Intel compiler. These versions have to match with loaded modules.
+    \* this file sets up the environmental variable for both MPI and OpenMP libraries.
+    \* this file sets up the paths to a particular version of the Intel MPI library and the particular version of the Intel compiler. These versions have to match with loaded modules.
 
-To access a MIC accelerator located on a node that user is currently connected to, use:
+To access the MIC accelerator located on a node that the user is currently connected to, use:
 
 ```console
 $ ssh mic0
 ```
 
-or in case you need specify a MIC accelerator on a particular node, use:
+or in case you need to specify an MIC accelerator on a particular node, use:
 
 ```console
 $ ssh r38u31n1000-mic0
@@ -781,9 +781,9 @@ Hello world from process 0 of 4 on host r38u31n1000-mic0
 
 #### Execution on Host
 
-If the MPI program is launched from host instead of the coprocessor, the environmental variables are not set using the ".profile" file. Therefore user has to specify library paths from the command line when calling "mpiexec".
+If the MPI program is launched from the host instead of the coprocessor, the environmental variables are not set using the ".profile" file. Therefore, the user has to specify library paths from the command line when calling "mpiexec".
 
-First step is to tell mpiexec that the MPI should be executed on a local accelerator by setting up the environmental variable "I_MPI_MIC"
+First step is to tell mpiexec that the MPI should be executed on the local accelerator by setting up the environmental variable "I_MPI_MIC"
 
 ```console
 $ export I_MPI_MIC=1
@@ -802,8 +802,8 @@ $ mpirun -genv LD_LIBRARY_PATH $MIC_LD_LIBRARY_PATH -host mic0 -n 4 ~/mpi-test-m
 ```
 
 !!! note
-    \* the full path to the binary has to specified (here: "**>~/mpi-test-mic**")
-    \* the LD_LIBRARY_PATH has to match with Intel MPI module used to compile the MPI code
+    \* the full path to the binary has to be specified (here: "**>~/mpi-test-mic**")
+    \* the LD_LIBRARY_PATH has to match with the Intel MPI module used to compile the MPI code
 
 The output should be again similar to:
 
@@ -815,7 +815,7 @@ Hello world from process 0 of 4 on host r38u31n1000-mic0
 ```
 
 !!! hint
-    **"mpiexec.hydra"** requires a file the MIC filesystem. If the file is missing contact the system administrators.
+    **"mpiexec.hydra"** requires a file on the MIC filesystem. If the file is missing, contact the system administrators.
 
 A simple test to see if the file is present is to execute:
 
@@ -826,14 +826,14 @@ $ ssh mic0 ls /bin/pmi_proxy
 
 #### Execution on Host - MPI Processes Distributed Over Multiple Accelerators on Multiple Nodes
 
-To get access to multiple nodes with MIC accelerator, user has to use PBS to allocate the resources. To start interactive session, that allocates 2 compute nodes = 2 MIC accelerators run qsub command with following parameters:
+To get access to multiple nodes with the MIC accelerator, the user has to use PBS to allocate the resources. To start an interactive session that allocates 2 compute nodes = 2 MIC accelerators, run qsub command with the following parameters:
 
 ```console
 $ qsub -I -q qprod -l select=2:ncpus=24:accelerator=True:naccelerators=2:accelerator_model=phi7120 -A NONE-0-0
 $ ml intel impi
 ```
 
-This command connects user through ssh to one of the nodes immediately. To see the other nodes that have been allocated use:
+This command connects the user via SSH to one of the nodes immediately. To see the other nodes that have been allocated, use:
 
 ```console
 $ cat $PBS_NODEFILE
@@ -846,15 +846,15 @@ r25u25n710.ib0.smc.salomon.it4i.cz
 r25u26n711.ib0.smc.salomon.it4i.cz
 ```
 
-This output means that the PBS allocated nodes cn204 and cn205, which means that user has direct access to "**r25u25n710-mic0**" and "**r25u26n711-mic0**" accelerators.
+This output means that the PBS allocated nodes cn204 and cn205, which means that the user has direct access to the "**r25u25n710-mic0**" and "**r25u26n711-mic0**" accelerators.
 
 !!! note
-    At this point user can connect to any of the allocated nodes or any of the allocated MIC accelerators using ssh:
-    - to connect to the second node : `$ ssh r25u26n711`
+    At this point, the user can connect to any of the allocated nodes or any of the allocated MIC accelerators using SSH:
+    - to connect to the second node: `$ ssh r25u26n711`
     - to connect to the accelerator on the first node from the first node:  `$ ssh r25u25n710-mic0` or `$ ssh mic0`
     - to connect to the accelerator on the second node from the first node: `$ ssh r25u25n711-mic0`
 
-At this point we expect that correct modules are loaded and binary is compiled. For parallel execution the mpiexec.hydra is used. Again the first step is to tell mpiexec that the MPI can be executed on MIC accelerators by setting up the environmental variable "I_MPI_MIC", don't forget to have correct FABRIC and PROVIDER defined.
+At this point, we expect that the correct modules are loaded and the binary is compiled. For parallel execution, the mpiexec.hydra is used. Again the first step is to tell mpiexec that the MPI can be executed on MIC accelerators by setting up the environmental variable "I_MPI_MIC"; do not forget to have correct FABRIC and PROVIDER defined.
 
 ```console
 $ export I_MPI_MIC=1
@@ -862,7 +862,7 @@ $ export I_MPI_FABRICS=shm:dapl
 $ export I_MPI_DAPL_PROVIDER_LIST=ofa-v2-mlx4_0-1u,ofa-v2-scif0,ofa-v2-mcm-1
 ```
 
-The launch the MPI program use:
+To launch the MPI program ,use:
 
 ```console
 $ mpirun -genv LD_LIBRARY_PATH $MIC_LD_LIBRARY_PATH \
@@ -878,7 +878,7 @@ $ mpirun -genv LD_LIBRARY_PATH \
 : -host r25u26n711-mic0 -n 6 ~/mpi-test-mic
 ```
 
-In this case four MPI processes are executed on accelerator cn204-mic and six processes are executed on accelerator cn205-mic0. The sample output (sorted after execution) is:
+In this case, four MPI processes are executed on the cn204-mic accelerator and six processes are executed on the cn205-mic0 accelerator. The sample output (sorted after execution) is:
 
 ```console
 Hello world from process 0 of 10 on host r25u25n710-mic0
@@ -893,7 +893,7 @@ Hello world from process 8 of 10 on host r25u26n711-mic0
 Hello world from process 9 of 10 on host r25u26n711-mic0
 ```
 
-The same way MPI program can be executed on multiple hosts:
+The same way, MPI program can be executed on multiple hosts:
 
 ```console
 $ mpirun -genv LD_LIBRARY_PATH $MIC_LD_LIBRARY_PATH \
@@ -903,10 +903,10 @@ $ mpirun -genv LD_LIBRARY_PATH $MIC_LD_LIBRARY_PATH \
 
 ### Symmetric Model
 
-In a symmetric mode MPI programs are executed on both host computer(s) and MIC accelerator(s). Since MIC has a different
-architecture and requires different binary file produced by the Intel compiler two different files has to be compiled before MPI program is executed.
+In a symmetric mode, MPI programs are executed on both the host computer(s) and the MIC accelerator(s). Since MIC has a different
+architecture and requires different binary file produced by the Intel compiler, two different files have to be compiled before the MPI program is executed.
 
-In the previous section we have compiled two binary files, one for hosts "**mpi-test**" and one for MIC accelerators "**mpi-test-mic**". These two binaries can be executed at once using mpiexec.hydra:
+In the previous section, we have compiled two binary files, one for hosts "**mpi-test**" and one for MIC accelerators "**mpi-test-mic**". These two binaries can be executed at once using mpiexec.hydra:
 
 ```console
 $ mpirun \
@@ -915,7 +915,7 @@ $ mpirun \
 : -host r38u32n1001-mic0 -n 2 ~/mpi-test-mic
 ```
 
-In this example the first two parameters (line 2 and 3) sets up required environment variables for execution. The third line specifies binary that is executed on host (here r38u32n1001) and the last line specifies the binary that is execute on the accelerator (here r38u32n1001-mic0).
+In this example, the first two parameters (line 2 and 3) set up required environment variables for execution. The third line specifies the binary that is executed on the host (here r38u32n1001) and the last line specifies the binary that is executed on the accelerator (here r38u32n1001-mic0).
 
 The output of the program is:
 
@@ -926,7 +926,7 @@ Hello world from process 2 of 4 on host r38u32n1001-mic0
 Hello world from process 3 of 4 on host r38u32n1001-mic0
 ```
 
-The execution procedure can be simplified by using the mpirun command with the machine file a a parameter. Machine file contains list of all nodes and accelerators that should used to execute MPI processes.
+The execution procedure can be simplified by using the mpirun command with the machine file as a parameter. The machine file contains a list of all nodes and accelerators that should be used to execute MPI processes.
 
 An example of a machine file that uses 2 >hosts (**r38u32n1001** and **r38u32n1002**) and 2 accelerators **(r38u32n1001-mic0** and **r38u32n1002-mic0**) to run 2 MPI processes on each of them:
 
@@ -938,13 +938,13 @@ r38u33n1002:2
 r38u33n1002-mic0:2
 ```
 
-In addition if a naming convention is set in a way that the name of the binary for host is **"bin_name"**  and the name of the binary for the accelerator is **"bin_name-mic"** then by setting up the environment variable **I_MPI_MIC_POSTFIX** to **"-mic"** user do not have to specify the names of booth binaries. In this case mpirun needs just the name of the host binary file (i.e. "mpi-test") and uses the suffix to get a name of the binary for accelerator (i..e. "mpi-test-mic").
+In addition, if a naming convention is set in a way that the name of the binary for the host is **"bin_name"** and the name of the binary for the accelerator is **"bin_name-mic"** then by setting up the environment variable **I_MPI_MIC_POSTFIX** to **"-mic"**, the user does not have to specify the names of both binaries. In this case, mpirun needs just the name of the host binary file (i.e. "mpi-test") and uses the suffix to get the name of the binary for accelerator (i.e. "mpi-test-mic").
 
 ```console
 $ export I_MPI_MIC_POSTFIX=-mic
 ```
 
-To run the MPI code using mpirun and the machine file "hosts_file_mix" use:
+To run the MPI code using mpirun and the machine file "hosts_file_mix", use:
 
 ```console
 $ mpirun \
@@ -967,11 +967,11 @@ Hello world from process 7 of 8 on host r38u32n1001-mic0
 ```
 
 !!! note
-    At this point the MPI communication between MIC accelerators on different nodes uses 1Gb Ethernet only.
+    At this point, the MPI communication between MIC accelerators on different nodes uses 1Gb Ethernet only.
 
 ### Using Automatically Generated Node-Files
 
-Set of node-files, that can be used instead of manually creating a new one every time, is generated for user convenience. Six node-files are generated:
+A set of node-files, which can be used instead of manually creating a new one every time, is generated for the user's convenience. Six node-files are generated:
 
 !!! note
     **Node-files:**
@@ -983,11 +983,11 @@ Set of node-files, that can be used instead of manually creating a new one every
      - /lscratch/${PBS_JOBID}/nodefile-mic-sn MICs only node-file, using short names
      - /lscratch/${PBS_JOBID}/nodefile-mix-sn Hosts and MICs node-file, using short names
 
-Each host or accelerator is listed only once per file. User has to specify how many jobs should be executed per node using `-n` parameter of the mpirun command.
+Each host or accelerator is listed only once per file. The user has to specify how many jobs should be executed per node using the `-n` parameter of the mpirun command.
 
 ## Optimization
 
-For more details about optimization techniques read Intel document [Optimization and Performance Tuning for Intel® Xeon Phi™ Coprocessors][e].
+For more details about optimization techniques read the Intel document [Optimization and Performance Tuning for Intel® Xeon Phi™ Coprocessors][e].
 
 [a]: http://software.intel.com/sites/products/documentation/doclib/mkl_sa/11/mkl_userguide_lnx/GUID-3DC4FC7D-A1E4-423D-9C0C-06AB265FFA86.htm
 [b]: http://software.intel.com/sites/default/files/11MIC42_How_to_Use_MKL_Automatic_Offload_0.pdf