diff --git a/docs.it4i/software/mic/mic_environment.md b/docs.it4i/software/mic/mic_environment.md
index 3b396225a512da228a3adc8b8a7ae62b6c5ce0d3..cc7dcbcd7fa4a43140076977e561b542994323bf 100644
--- a/docs.it4i/software/mic/mic_environment.md
+++ b/docs.it4i/software/mic/mic_environment.md
@@ -2,125 +2,17 @@
Intel Xeon Phi accelerator can be programmed in several modes. The default mode on the cluster is offload mode, but all modes described in this document are supported.
-!!! warning
- Only Salomon cluster.
-
## Intel Utilities for Xeon Phi
-To get access to a compute node with Intel Xeon Phi accelerator, use the PBS interactive session
-
-```console
-$ qsub -I -q qprod -l select=1:ncpus=24:accelerator=True -A NONE-0-0
-```
-
-To set up the environment module `intel` has to be loaded, without specifying the version, default version is loadedi
-
-```console
-$ ml intel/2017b
-```
-
-Information about the hardware can be obtained by running the micinfo program on the host.
-
-```console
-$ /usr/bin/micinfo
-```
-
-The output of the `micinfo` utility executed on one of the cluster node is as follows. (note: to get PCIe related details the command has to be run with root privileges)
-
-```console
-MicInfo Utility Log
-Created Thu Dec 7 09:19:43 2017
-
-
- System Info
- HOST OS : Linux
- OS Version : 2.6.32-696.10.3.el6.x86_64
- Driver Version : 3.8.2-1
- MPSS Version : 3.8.2
- Host Physical Memory : 128838 MB
-
-Device No: 0, Device Name: mic0
-
- Version
- Flash Version : 2.1.02.0391
- SMC Firmware Version : 1.17.6900
-...
-```
-
-## Offload Mode
-
-To compile a code for Intel Xeon Phi a MPSS stack has to be installed on the machine where compilation is executed. Currently the MPSS stack is only installed on compute nodes equipped with accelerators.
-
-```console
-$ qsub -I -q qprod -l select=1:ncpus=24:accelerator=True -A NONE-0-0
-```
-
-A very basic example of code that employs offload programming technique is shown in the next listing. Please note that this code is sequential and utilizes only single core of the accelerator.
-
-```cpp
-#include <iostream>
-
-int main(int argc, char* argv[])
-{
- const int niter = 100000;
- double result = 0;
-
- #pragma offload target(mic)
- for (int i = 0; i < niter; ++i) {
- const double t = (i + 0.5) / niter;
- result += 4.0 / (t * t + 1.0);
- }
- result /= niter;
- std::cout << "Pi ~ " << result << '\n';
-}
-```
-
-### Intel
-
-To compile a code using Intel compiler run following commands
-
-* Create `source-offload.cpp`
-
-```console
-$ vim source-offload.cpp
-```
-
-```cpp
-#include <iostream>
-
-int main(int argc, char* argv[])
-{
- const int niter = 100000;
- double result = 0;
-
- #pragma offload target(mic)
- for (int i = 0; i < niter; ++i) {
- const double t = (i + 0.5) / niter;
- result += 4.0 / (t * t + 1.0);
- }
- result /= niter;
- std::cout << "Pi ~ " << result << '\n';
-}
-```
-
-* Compile
-
-```console
-$ ml intel/2017b
-$ icc source-offload.cpp -o bin-offload
-```
-
-* To execute the code, run the following command on the host
-
-```console
-$ ./bin-offload
-Pi ~ 3.14159
-```
+Continue [here](../intel/intel-xeon-phi-salomon/)
### GCC With [KNC](https://en.wikipedia.org/wiki/Xeon_Phi) Support
On Salomon cluster we have module `GCC/5.1.1-knc` with cross-compiled support. (gcc, g++ and gfortran)
+!!! warning
+ Only Salomon cluster.
+
To compile a code using GCC compiler run following commands
* Create `reduce_mul.c`