6 merge requests!368Update prace.md to document the change from qprace to qprod as the default...,!367Update prace.md to document the change from qprace to qprod as the default...,!366Update prace.md to document the change from qprace to qprod as the default...,!323extended-acls-storage-section,!196Master,!174MIC
Intel Xeon Phi accelerator can be programmed in several modes. The default mode on the cluster is offload mode, but all modes described in this document are supported.
!!! warning
Only Salomon cluster.
## Intel Utilities for Xeon Phi
To get access to a compute node with Intel Xeon Phi accelerator, use the PBS interactive session
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@@ -10,7 +13,7 @@ To get access to a compute node with Intel Xeon Phi accelerator, use the PBS int
$qsub -I-q qprod -lselect=1:ncpus=24:accelerator=True -A NONE-0-0
```
To set up the environment module "intel" has to be loaded, without specifying the version, default version is loadedi
To set up the environment module `intel` has to be loaded, without specifying the version, default version is loadedi
```console
$ml intel/2017b
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@@ -22,7 +25,7 @@ Information about the hardware can be obtained by running the micinfo program on
$/usr/bin/micinfo
```
The output of the "micinfo" utility executed on one of the cluster node is as follows. (note: to get PCIe related details the command has to be run with root privileges)
The output of the `micinfo` utility executed on one of the cluster node is as follows. (note: to get PCIe related details the command has to be run with root privileges)
To produce a binary compatible with Intel Xeon Phi architecture user has to specify "-mmic" compiler flag. Two compilation examples are shown below. The first example shows how to compile OpenMP parallel code `vect-add.c` for host only
To produce a binary compatible with Intel Xeon Phi architecture user has to specify `-mmic` compiler flag. Two compilation examples are shown below. The first example shows how to compile OpenMP parallel code `vect-add.c` for host only