Commit 50709aa9 authored by Josef Hrabal's avatar Josef Hrabal
Browse files

Merge branch 'fix_menu_and_accesing' into 'master'

Fix menu and accesing

See merge request sccs/docs.it4i.cz!202
parents 4e9435d4 6570b3a3
......@@ -2,7 +2,7 @@
Welcome to Anselm supercomputer cluster. The Anselm cluster consists of 209 compute nodes, totaling 3344 compute cores with 15 TB RAM and giving over 94 TFLOP/s theoretical peak performance. Each node is a powerful x86-64 computer, equipped with 16 cores, at least 64 GB RAM, and 500 GB hard disk drive. Nodes are interconnected by fully non-blocking fat-tree InfiniBand network and equipped with Intel Sandy Bridge processors. A few nodes are also equipped with NVIDIA Kepler GPU or Intel Xeon Phi MIC accelerators. Read more in [Hardware Overview](hardware-overview/).
The cluster runs [operating system](software/operating-system/), which is compatible with the RedHat [Linux family.](http://upload.wikimedia.org/wikipedia/commons/1/1b/Linux_Distribution_Timeline.svg) We have installed a wide range of software packages targeted at different scientific domains. These packages are accessible via the [modules environment](environment-and-modules/).
The cluster runs operating system, which is compatible with the RedHat [Linux family.](http://upload.wikimedia.org/wikipedia/commons/1/1b/Linux_Distribution_Timeline.svg) We have installed a wide range of software packages targeted at different scientific domains. These packages are accessible via the [modules environment](../environment-and-modules/).
User data shared file-system (HOME, 320 TB) and job data shared file-system (SCRATCH, 146 TB) are available to users.
......
......@@ -373,9 +373,6 @@ exit
In this example, input and executable files are assumed preloaded manually in /scratch/$USER/myjob directory. Note the **mpiprocs** and **ompthreads** qsub options, controlling behavior of the MPI execution. The mympiprog.x is executed as one process per node, on all 100 allocated nodes. If mympiprog.x implements OpenMP threads, it will run 16 threads per node.
More information is found in the [Running OpenMPI](software/mpi/Running_OpenMPI/) and [Running MPICH2](software/mpi/running-mpich2/)
sections.
### Example Jobscript for Single Node Calculation
!!! note
......
......@@ -134,7 +134,7 @@ Most grid services require the use of your certificate; however, the format of y
If employing the PRACE version of GSISSH-term (also a Java Web Start Application), you may use either the PEM or p12 formats. Note that this service automatically installs up-to-date PRACE CA certificates.
If the grid service is UNICORE, then you bind your certificate, in either the p12 format or JKS, to UNICORE during the installation of the client on your local machine. For more information, please visit [UNICORE6 in PRACE](www.prace-ri.eu/UNICORE6-in-PRACE)
If the grid service is UNICORE, then you bind your certificate, in either the p12 format or JKS, to UNICORE during the installation of the client on your local machine. For more information, please visit [UNICORE6 in PRACE](http://www.prace-ri.eu/UNICORE6-in-PRACE)
If the grid service is part of Globus, such as GSI-SSH, GriFTP or GRAM5, then the certificates can be in either p12 or PEM format and must reside in the "$HOME/.globus" directory for Linux and Mac users or %HOMEPATH%.globus for Windows users. (Windows users will have to use the DOS command ’cmd’ to create a directory which starts with a ’.’). Further, user certificates should be named either "usercred.p12" or "usercert.pem" and "userkey.pem", and the CA certificates must be kept in a pre-specified directory as follows. For Linux and Mac users, this directory is either $HOME/.globus/certificates or /etc/grid-security/certificates. For Windows users, this directory is %HOMEPATH%.globuscertificates. (If you are using GSISSH-Term from prace-ri.eu then you do not have to create the .globus directory nor install CA certificates to use this tool alone).
......
......@@ -44,7 +44,7 @@ Configure network for virtualization, create interconnect for fast communication
$ qsub ... -l virt_network=true
```
[See Tap Interconnect](/anselm/software/virtualization/#tap-interconnect)
[See Tap Interconnect](software/tools/virtualization/#tap-interconnect)
## x86 Adapt Support
......@@ -98,4 +98,4 @@ To enable Intel Hyper Threading on allocated nodes CPUs
```console
$ qsub ... -l cpu_hyper_threading=true
```
\ No newline at end of file
```
......@@ -15,7 +15,7 @@ $ ml intel
$ idb
```
Read more at the [Intel Debugger](../intel-suite/intel-debugger/) page.
Read more at the [Intel Debugger](../intel/intel-suite/intel-debugger/) page.
## Allinea Forge (DDT/MAP)
......
......@@ -28,7 +28,7 @@ Instead of [running your MPI program the usual way](../mpi/mpi/), use the the pe
$ perf-report mpirun ./mympiprog.x
```
The MPI program will run as usual. The perf-report creates two additional files, in \*.txt and \*.html format, containing the performance report. Note that demanding MPI codes should be run within [the queue system](../../job-submission-and-execution/).
The MPI program will run as usual. The perf-report creates two additional files, in \*.txt and \*.html format, containing the performance report. Note that demanding MPI codes should be run within [the queue system](../../salomon/job-submission-and-execution/).
## Example
......
......@@ -193,7 +193,7 @@ $ ./matrix
!!! note
PAPI currently supports only a subset of counters on the Intel Xeon Phi processor compared to Intel Xeon, for example the floating point operations counter is missing.
To use PAPI in [Intel Xeon Phi](../intel-xeon-phi/) native applications, you need to load module with " -mic" suffix, for example " papi/5.3.2-mic" :
To use PAPI in [Intel Xeon Phi](../intel/intel-xeon-phi-salomon/) native applications, you need to load module with " -mic" suffix, for example " papi/5.3.2-mic" :
```console
$ ml papi/5.3.2-mic
......
......@@ -4,7 +4,7 @@ IDB is no longer available since Intel Parallel Studio 2015
## Debugging Serial Applications
The intel debugger version is available, via module intel/13.5.192. The debugger works for applications compiled with C and C++ compiler and the ifort fortran 77/90/95 compiler. The debugger provides java GUI environment. Use [X display](../../general/accessing-the-clusters/graphical-user-interface/x-window-system/) for running the GUI.
The intel debugger version is available, via module intel/13.5.192. The debugger works for applications compiled with C and C++ compiler and the ifort fortran 77/90/95 compiler. The debugger provides java GUI environment. Use [X display](../../../general/accessing-the-clusters/graphical-user-interface/x-window-system/) for running the GUI.
```console
$ ml intel/13.5.192
......@@ -18,7 +18,7 @@ The debugger may run in text mode. To debug in text mode, use
$ idbc
```
To debug on the compute nodes, module intel must be loaded. The GUI on compute nodes may be accessed using the same way as in [the GUI section](../../general/accessing-the-clusters/graphical-user-interface/x-window-system/)
To debug on the compute nodes, module intel must be loaded. The GUI on compute nodes may be accessed using the same way as in [the GUI section](../../../general/accessing-the-clusters/graphical-user-interface/x-window-system/)
Example:
......@@ -40,7 +40,7 @@ In this example, we allocate 1 full compute node, compile program myprog.c with
### Small Number of MPI Ranks
For debugging small number of MPI ranks, you may execute and debug each rank in separate xterm terminal (do not forget the [X display](../../general/accessing-the-clusters/graphical-user-interface/x-window-system/)). Using Intel MPI, this may be done in following way:
For debugging small number of MPI ranks, you may execute and debug each rank in separate xterm terminal (do not forget the [X display](../../../general/accessing-the-clusters/graphical-user-interface/x-window-system/)). Using Intel MPI, this may be done in following way:
```console
$ qsub -q qexp -l select=2:ncpus=24 -X -I
......@@ -70,4 +70,4 @@ Run the idb debugger in GUI mode. The menu Parallel contains number of tools for
## Further Information
Exhaustive manual on IDB features and usage is published at Intel website, <https://software.intel.com/sites/products/documentation/doclib/iss/2013/compiler/cpp-lin/>
Exhaustive manual on IDB features and usage is published at [Intel website](https://software.intel.com/sites/products/documentation/doclib/iss/2013/compiler/cpp-lin/).
......@@ -109,7 +109,7 @@ In this example, we compile, link and run the cblas_dgemm example, using LP64 in
## MKL and MIC Accelerators
The Intel MKL is capable to automatically offload the computations o the MIC accelerator. See section [Intel Xeon Phi](../intel-xeon-phi/) for details.
The Intel MKL is capable to automatically offload the computations o the MIC accelerator. See section [Intel Xeon Phi](../intel-xeon-phi-salomon/) for details.
## LAPACKE C Interface
......
......@@ -2,7 +2,7 @@
## Intel Threading Building Blocks
Intel Threading Building Blocks (Intel TBB) is a library that supports scalable parallel programming using standard ISO C++ code. It does not require special languages or compilers. To use the library, you specify tasks, not threads, and let the library map tasks onto threads in an efficient manner. The tasks are executed by a runtime scheduler and may be offloaded to [MIC accelerator](../intel-xeon-phi/).
Intel Threading Building Blocks (Intel TBB) is a library that supports scalable parallel programming using standard ISO C++ code. It does not require special languages or compilers. To use the library, you specify tasks, not threads, and let the library map tasks onto threads in an efficient manner. The tasks are executed by a runtime scheduler and may be offloaded to [MIC accelerator](../intel-xeon-phi-salomon/).
Intel is available on the cluster.
......
......@@ -21,7 +21,7 @@ The trace will be saved in file myapp.stf in the current directory.
## Viewing Traces
To view and analyze the trace, open ITAC GUI in a [graphical environment](../../general/accessing-the-clusters/graphical-user-interface/x-window-system/):
To view and analyze the trace, open ITAC GUI in a [graphical environment](../../../general/accessing-the-clusters/graphical-user-interface/x-window-system/):
```console
$ ml itac/9.1.2.024
......
......@@ -20,8 +20,8 @@ Read more about available versions at the [TensorFlow page](tensorflow/).
## Theano
Read more about available versions at the [Theano page](theano/).
Read more about [available versions](../../modules-matrix/).
## Keras
Read more about available versions at the [Keras page](keras/).
Read more about [available versions](../../modules-matrix/).
......@@ -138,4 +138,4 @@ In the previous two cases with one or two MPI processes per node, the operating
The [**OpenMPI 1.8.6**](http://www.open-mpi.org/) is based on OpenMPI. Read more on [how to run OpenMPI](Running_OpenMPI/) based MPI.
The Intel MPI may run on the[Intel Xeon Ph](../intel-xeon-phi/)i accelerators as well. Read more on [how to run Intel MPI on accelerators](../intel-xeon-phi/).
The Intel MPI may run on the [Intel Xeon Ph](../intel/intel-xeon-phi-salomon/) accelerators as well. Read more on [how to run Intel MPI on accelerators](../intel/intel-xeon-phi-salomon/).
......@@ -152,4 +152,4 @@ $ mpirun -bindto numa echo $OMP_NUM_THREADS
## Intel MPI on Xeon Phi
The[MPI section of Intel Xeon Phi chapter](../intel-xeon-phi/) provides details on how to run Intel MPI code on Xeon Phi architecture.
The[MPI section of Intel Xeon Phi chapter](../intel/intel-xeon-phi-salomon/) provides details on how to run Intel MPI code on Xeon Phi architecture.
......@@ -60,11 +60,11 @@ Octave may use MPI for interprocess communication This functionality is currentl
## Xeon Phi Support
Octave may take advantage of the Xeon Phi accelerators. This will only work on the [Intel Xeon Phi](../intel-xeon-phi/) [accelerated nodes](../../salomon/compute-nodes/).
Octave may take advantage of the Xeon Phi accelerators. This will only work on the [Intel Xeon Phi](../intel/intel-xeon-phi-salomon/) [accelerated nodes](../../salomon/compute-nodes/).
### Automatic Offload Support
Octave can accelerate BLAS type operations (in particular the Matrix Matrix multiplications] on the Xeon Phi accelerator, via [Automatic Offload using the MKL library](../intel-xeon-phi/#section-3)
Octave can accelerate BLAS type operations (in particular the Matrix Matrix multiplications] on the Xeon Phi accelerator, via [Automatic Offload using the MKL library](../intel/intel-xeon-phi-salomon/)
Example
......@@ -88,7 +88,7 @@ In this example, the calculation was automatically divided among the CPU cores a
### Native Support
A version of [native](../intel-xeon-phi/#section-4) Octave is compiled for Xeon Phi accelerators. Some limitations apply for this version:
A version of [native](../intel/intel-xeon-phi-salomon/) Octave is compiled for Xeon Phi accelerators. Some limitations apply for this version:
* Only command line support. GUI, graph plotting etc. is not supported.
* Command history in interactive mode is not supported.
......
......@@ -91,8 +91,6 @@ More information and examples may be obtained directly by reading the documentat
> vignette("parallel")
```
Download the package [parallell](package-parallel-vignette.pdf) vignette.
The forking is the most simple to use. Forking family of functions provide parallelized, drop in replacement for the serial apply() family of functions.
!!! warning
......@@ -402,4 +400,4 @@ By leveraging MKL, R can accelerate certain computations, most notably linear al
$ export MKL_MIC_ENABLE=1
```
[Read more about automatic offload](../intel-xeon-phi/)
[Read more about automatic offload](../intel/intel-xeon-phi-salomon/)
......@@ -10,7 +10,7 @@ Intel Math Kernel Library (Intel MKL) is a library of math kernel subroutines, e
$ ml mkl **or** ml imkl
```
Read more at the [Intel MKL](../intel-suite/intel-mkl/) page.
Read more at the [Intel MKL](../intel/intel-suite/intel-mkl/) page.
## Intel Integrated Performance Primitives
......@@ -20,7 +20,7 @@ Intel Integrated Performance Primitives, version 7.1.1, compiled for AVX is avai
$ ml ipp
```
Read more at the [Intel IPP](../intel-suite/intel-integrated-performance-primitives/) page.
Read more at the [Intel IPP](../intel/intel-suite/intel-integrated-performance-primitives/) page.
## Intel Threading Building Blocks
......@@ -30,4 +30,4 @@ Intel Threading Building Blocks (Intel TBB) is a library that supports scalable
$ ml tbb
```
Read more at the [Intel TBB](../intel-suite/intel-tbb/) page.
Read more at the [Intel TBB](../intel/intel-suite/intel-tbb/) page.
......@@ -54,5 +54,4 @@ All these libraries can be used also alone, without PETSc. Their static or share
* [PT-Scotch](http://www.labri.fr/perso/pelegrin/scotch/)
* preconditioners & multigrid
* [Hypre](http://www.nersc.gov/users/software/programming-libraries/math-libraries/petsc/)
* [Trilinos ML](http://trilinos.sandia.gov/packages/ml/)
* [SPAI - Sparse Approximate Inverse](https://bitbucket.org/petsc/pkg-spai)
......@@ -32,7 +32,7 @@ First, load the appropriate module:
$ ml trilinos
```
For the compilation of CMake-aware project, Trilinos provides the FIND_PACKAGE( Trilinos ) capability, which makes it easy to build against Trilinos, including linking against the correct list of libraries. For details, see <http://trilinos.sandia.gov/Finding_Trilinos.txt>
For the compilation of CMake-aware project, Trilinos provides the FIND_PACKAGE( Trilinos ) capability, which makes it easy to build against Trilinos, including linking against the correct list of libraries.
For compiling using simple Makefiles, Trilinos provides Makefile.export system, which allows users to include important Trilinos variables directly into their Makefiles. This can be done simply by inserting the following line into the Makefile:
......@@ -46,4 +46,4 @@ or
include Makefile.export.<package>
```
if you are interested only in a specific Trilinos package. This will give you access to the variables such as Trilinos_CXX_COMPILER, Trilinos_INCLUDE_DIRS, Trilinos_LIBRARY_DIRS etc. For the detailed description and example Makefile see <http://trilinos.sandia.gov/Export_Makefile.txt>.
if you are interested only in a specific Trilinos package. This will give you access to the variables such as Trilinos_CXX_COMPILER, Trilinos_INCLUDE_DIRS, Trilinos_LIBRARY_DIRS etc.
......@@ -47,7 +47,7 @@ echo Machines: $hl
/ansys_inc/v145/CFX/bin/cfx5solve -def input.def -size 4 -size-ni 4x -part-large -start-method "Platform MPI Distributed Parallel" -par-dist $hl -P aa_r
```
Header of the PBS file (above) is common and description can be find on [this site](../../anselm/job-submission-and-execution/). SVS FEM recommends to utilize sources by keywords: nodes, ppn. These keywords allows to address directly the number of nodes (computers) and cores (ppn) which will be utilized in the job. Also the rest of code assumes such structure of allocated resources.
Header of the PBS file (above) is common and description can be find on [this site](../../../anselm/job-submission-and-execution/). SVS FEM recommends to utilize sources by keywords: nodes, ppn. These keywords allows to address directly the number of nodes (computers) and cores (ppn) which will be utilized in the job. Also the rest of code assumes such structure of allocated resources.
Working directory has to be created before sending PBS job into the queue. Input file should be in working directory or full path to input file has to be specified. >Input file has to be defined by common CFX def file which is attached to the CFX solver via parameter -def
......
Markdown is supported
0% or .
You are about to add 0 people to the discussion. Proceed with caution.
Finish editing this message first!
Please register or to comment